HDCaml
HDCaml provides a framework for describing hardware structures in OCaml.
Given a functional hardware description, HDCaml will produce a Verilog
netlist for verification and implementation.
HDCaml also has decent PSL support for assertion based verification.
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| Author: | Tom Hawkins. |
| Last modification date: | 07-Nov-2005 |
| Version: | 0.2.9 |
| Development status: | Beta |
| Kind: | Libraries :: Native OCaml libraries |
| License: | Open Source :: LGPL |
| Topic: | System :: Hardware |
| Software development :: Code generators | |
| Homepage: | http://funhdl.org/wiki/doku.php?id=hdcaml |