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[Caml-list] Bigarray access speed
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| Date: | -- (:) |
| From: | malc <malc@p...> |
| Subject: | Re: float array alignment; was Re: [Caml-list] Bigarray access speed |
On Mon, 19 Aug 2002, Xavier Leroy wrote: > malc writes: > > To get maximal speed of the inner loops data needs to be naturally > > aligned. OCaml does nothing to enforce it for non-big arrays. Bigarrays on > > the other hand are mmaped(4k on IA32) and you get perfectly aligned data > > for free. I was thinking that maybe Array can be extended with > > make[create]_aligned, for speed/space tradeoff. > > As William Chester said, allocating 8-aligned arrays isn't really > hard, but keeping them 8-aligned across copying collection, > compaction, and structured I/O is quite a pain. > > My experiments indicate that the lack of alignment on float arrays > (or more precisely the fact that they are 4-aligned instead of > 8-aligned) has negligible impact on performance for the IA32 (Pentium) > and PowerPC processors, but non-negligible for SPARC and MIPS. > And of course on a 64-bit architecture the problem goes away because > everything in the Caml heap is then 8-aligned. Since I expect IA32 > and PowerPC to remain dominant until we massively switch to 64-bit > processors, there's no urgent need to do something about float array > alignment. IA32 is now much bigger family, and unlucky owners of AMD 7th generation machines, such as myself, do pay a price for unaligned double precission float accesses. -- mailto:malc@pulsesoft.com ------------------- To unsubscribe, mail caml-list-request@inria.fr Archives: http://caml.inria.fr Bug reports: http://caml.inria.fr/bin/caml-bugs FAQ: http://caml.inria.fr/FAQ/ Beginner's list: http://groups.yahoo.com/group/ocaml_beginners