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HDCaml 0.2.0
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Date: -- (:)
From: Tom Hawkins <tom@c...>
Subject: HDCaml 0.2.0
HDCaml is a hardware description language embedded in OCaml.  Given a 
digital design in HDCaml, the tools will output a synthesizable Verilog 
netlist with PSL assertions for verification.

Though HDCaml is still in early beta, 0.2 has undergone a major cleanup 
of the API.  All comments are welcome.  To download...

To generate the [undocumented] example...

 > ocaml hdcaml.cma
         Objective Caml version 3.09.0

# Hdcaml.Example.all_prims ();;