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Array 4 MB size limit
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Date: -- (:)
From: skaller <skaller@u...>
Subject: Re: [Caml-list] Array 4 MB size limit
On Sat, 2006-05-20 at 23:42 +0200, Oliver Bandel wrote:
> On Sat, May 20, 2006 at 08:12:22PM +1000, skaller wrote:

> Two dual core G5:

We're looking at how N will increase in N-core CPU chips. 

There are plenty of boards that support
multiple CPUs (you can get a 8x Opteron board, that's 16 cores,
and not really that expensive -- the CPUs are though :).

'In theory' CISC should die, RISC should support higher N
on the same wafer.

John Skaller <skaller at users dot sf dot net>
Felix, successor to C++: