Version française
Home     About     Download     Resources     Contact us    

This site is updated infrequently. For up-to-date information, please visit the new OCaml website at

Browse thread
CFV'06: Call for Papers
[ Home ] [ Index: by date | by threads ]
[ Search: ]

[ Message by date: previous | next ] [ Message in thread: previous | next ] [ Thread: previous | next ]
Date: 2006-05-29 (06:03)
From: Miroslav Velev <mvelev@g...>
Subject: CFV'06: Call for Papers
Call for Papers: CFV'06

Fourth International Workshop on Constraints in Formal Verification

Paper submission deadline: June 5

CFV'06 will be held on August 22, and will be part of

the 3rd  International Joint Conference on Automated Reasoning (IJCAR'06),

a conference at the Federated Logic Conference (FLoC)

in Seattle, Washington, August 2006


Formal verification is of crucial significance in the development of
hardware and software systems. In the last few years, tremendous progress
was made in both the speed and capacity of constraint technology. Most
notably, SAT solvers have become orders of magnitude faster and capable of
handling problems that are orders of magnitude bigger, thus enabling the
formal verification of more complex computer systems. As a result, the
formal verification of hardware and software has become a promising area for
research and industrial applications.

The main goals of the Constraints in Formal Verification workshop are to
bring together researchers from the CSP/SAT and the formal verification
communities, to describe new applications of constraint technology to formal
verification, to disseminate new challenging problem instances, and to
propose new dedicated algorithms for hard formal verification problems.

This workshop will be of interest to researchers from academia and industry,
working in constraints or in formal verification and interested in the
application of constraints in formal verification.


The scope of the workshop includes topics related with the application of
constraint technology in formal verification, namely:

application of constraint solvers to hardware verification;

application of constraint solvers to software verification;

dedicated solvers for formal verification problems;

challenging formal verification problems.


The workshop will be scheduled for one full day. We expect to structure the
workshop to allow ample time for discussion and demonstration of new tools
and new problem instances.


Submissions can include one of the following:

-A workshop paper of up to 15 pages in LNCS format.

-A short paper of up to 4 pages, in LNCS format, describing an industrial

Workshop Chairs

Joao Marques-Silva, University of Southampton, UK

Miroslav Velev, Consultant, U.S.A.

Program Committee

Armin Biere, Johannes Kepler University, Austria

Louise Dennis, University of Nottingham, U.K.

Wolfgang Kunz, Technical University of Kaiserslautern, Germany

Ines Lynce, Technical University of Lisbon, Portugal

Darko Marinov, University of Illinois at Urbana-Champaign, U.S.A.

John Moondanos, Intel, U.S.A.

Chao Wang, NEC Research Labs, U.S.A.

Li-C. Wang, University of Santa Barbara, U.S.A.