Hello,

"Harrison, John R" <john.r.harrison@intel.com> writes:

> Both the old Inmos Transputer and the the more recent IBM/Sony/Toshiba
> Cell processor have/had a dedicated area of fast memory, rather like a
> giant memory-based register file.

The Cell SPE has 128 registers of 128 bits.

http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/FC857AE550F7EB83872571A80061F788/$file/CBE_Tutorial_v2.1_1March2007.pdf

"Synergistic Processor Elements (SPEs) The eight SPEs are SIMD
 processors optimized for data-rich operations allocated to them by the
 PPE. Each of these identical elements contains a RISC core, 256-KB,
 software-controlled local store for instructions and data, and a large
 (128-bit, 128-entry) unified register file."


Yours,
d.
-- 
GPG/PGP key: A3AD7A2A David MENTRE <dmentre@linux-france.org>
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