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More registers in modern day CPUs
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Date: -- (:)
From: David MENTRE <dmentre@l...>
Subject: Re: [Caml-list] minithread (was OCaml on Sony PS3)

2007/12/3, Christophe Raffalli <>:
> If you launch one minithread per SPU or CORE with a minor heap of the
> correct size and you fine tune you application to produce not too much
> cache misses, then, I think this simple model could be usefull ????

I might have not completely understood your proposal but it seems to
me that those mini-threads do not solve the issue. In the Cell
architecture, the SPU are *independent* processors. They access the
main memory through DMA like operations and do not have cache. In
other words, for you mini-threads to work on the SPU, you need to fit
the mini-thread s' data, code and environment (e.g. GC) in 256 KB of
memory. As Xavier said, it seems quite difficult if not impossible.