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Where's my non-classical shared memory concurrency technology?
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| Date: | -- (:) |
| From: | Martin Berger <M.Berger@d...> |
| Subject: | Re: [Caml-list] Re: Where's my non-classical shared memory concurrency technology? |
Ulf Wigner wrote: > Going back to Jon's observation that you cannot exploit > multicore with event-based programming, I'm inclined to > agree, even though I think that message-passing concurrency > is quite suitable for making use of multiple cores (albeit > addressing a wholly different problem from data parallelism). As more and more core will be put on a single chip, most cores will be communicating via a network on chip. Hence message passing is unavoidable. And if it is unavoidable then maybe we should have it all the way. > When scaling up message-passing (or event-based) concurrency, > you have to do one of two things: > > 1) ensure that your code is stable in the face of timing > variations and message reordering > 2) calculate the entire event/state matrix That's right. Martin