English version
Accueil     À propos     Téléchargement     Ressources     Contactez-nous    

Ce site est rarement mis à jour. Pour les informations les plus récentes, rendez-vous sur le nouveau site OCaml à l'adresse ocaml.org.

Browse thread
DSD'2007 submission reminder
[ Home ] [ Index: by date | by threads ]
[ Search: ]

[ Message by date: previous | next ] [ Message in thread: previous | next ] [ Thread: previous | next ]
Date: 2007-02-19 (15:09)
From: Hana Kubatova <kubatova@d...>
Subject: DSD'2007 submission reminder
Dear Colleague,

the submission deadline to DSD'2007 (March 1, 2007) is approaching,
and consequently, we are asking the prospective authors to submit
their papers before the deadline.

Please follow the links to see the DSD'2007 Call for Papers and Call
for Papers for each Special Session. A brief info with areas of
interest follows.

DSD'2007 conference Call for Papers: http://dsd07.felk.cvut.cz/DSD2007.pdf

SS1: Resource Aware Sensor Network Systems

SS2: Advanced issues of Networks-on-Chip

SS3: Dependability and Testing of Digital Systems

            Call  For  Papers

                DSD 2007
     Architectures, Methods and Tools

August 29 - 31, 2007, Lübeck in Germany

conference web pages:

Important dates:
Submission of papers:                 March 1, 2007
Notification of acceptance:           May 1, 2007
Deadline for final version:             June 4, 2007
Deadline for registration:              June 9, 2007

The main areas of interest are the following:

T1: Systems-on-a-chip/in-a-package:
 - generic system platforms and platform-based design
 - network on chip
 - multi-processors
 - system on re-configurable chip
 - system FPGAs and structured ASICs
 - rapid prototyping
 - asynchronous systems
 - power, energy, timing, predictability and other quality issues
 - intellectual property, virtual components and design reuse

T2: Programmable/re-configurable architectures:
 - re-configurable system architectures, processor, communication,
memory and software architectures with focus on application specific
and/or embedded computing, co-processors
 - processing arrays
 - programmable fabrics
 - embedded software
 - arithmetic, logic and special-operator units

T3: System, hardware and embedded software specification, modeling and
 - design languages
 - functional, structural and parametric specification and modeling
 - simulation, emulation, prototyping, and testing at the system,
register-transfer, logic and physical levels
 - co-simulation and co-verification.

T4: System, hardware and embedded software synthesis:
 - system, hardware/software and embedded software synthesis
 - behavioral, register-transfer, logic and physical circuit synthesis
 - multi-objective optimization observing power, performance,
communication, interconnections, layout, technology, reliability,
robustness, security, testability and other issues
 - (dynamic) management of computational resources, power, energy etc.
 - design environments for embedded systems.

T5: Emerging technologies, system paradigms and design methodologies:
 - optical, bio, nano and quantum technologies and computing
 - self-organizing and self-adapting (wireless) systems
 - wireless sensor networks
 - ambient intelligence and augmented reality
 - ubiquitous, wearable and implanted systems
 - deep sub-micron design issues.

T6: Applications of (embedded) digital systems with emphasis on
demanding and new applications in fields such as
 - (wireless) communication and networking
 - measurement and instrumentation
 - health-care and medicine
 - military, space, avionic and automotive systems
 - security
 - multi-media, instrumentation and ambient intelligence.

The areas of interrest of special section is following:
SS1: Resource Aware Sensor Network Systems
The special session on "Resource-Aware Sensor Network Systems"
addresses concepts, implementations and applications of sensor network
systems, as well as, new architectural models and hardware solutions
in the sensor network domain. Papers on any of the following and
related topics will be considered for the special session:
 - Sensor node architectures
 - Sensing, processing, and communicating on a chip
 - Communication-computation trade-offs
 - Resource-aware software/hardware co-design
 - Low-power strategies in hardware design
 - Energy harvesting strategies
 - Position determination and synchronization in sensor networks
 - In-Network processing and aggregation
 - Fault-tolerant and reliable hardware
 - Prototypes and applications

SS2: Advanced issues of Networks-on-Chip
This special session addresses all aspects related to concepts,
implementations and applications of networks-on-chip as well as
related EDA tools. Nonetheless, its focus is on advanced issues and
interdisciplinary topics like system control, design flow, application
studies and the outlook on future developments in NOC design. Papers
on any of the following and related topics will be considered for the
special session:
 - Future concepts and architectures: Links, Routers, Topology
 - Reconfiguration and Hardwired NOCs on FPGAs
 - Programming models, Application mapping, Benchmarking
 - Operating systems and System control
 - Reliability, Fault-tolerance, Robustness
 - Verification and Testability
 - Design flow and Design space exploration
 - Prototypes and Application studies.

SS3: Dependability and Testing of Digital Systems
The special session on "Dependability and Testing of Digital Systems"
addresses emerging issues, hot problems, new solution methods and
their hardware and software implementations in all fields of digital
and mixed-signal system dependability and testing. Its special focus
is on the dependability and testing related to the SoC technology and
modern embedded applications:
 - Built-in Self-Test - off-line BIST and on-line BIST
 - SoC and NoC Dependability and Testing
 - Robust Circuit and System Design
 - On-line testing; IDDQ and Current Testing
 - Defect/Fault Tolerance
 - Dependability and Reliability - Modeling and Computations
 - Synthesis for Testability
 - Diagnosis Embedded Test
 - Analog, Mixed-Signal and RF Test
 - Memory and Processor Test.


Hana Kubatova
DSD'2007 Program Chairman