Date: Tue, 01 Sep 1998 13:33:06 +0200
From: Ping Hu <Ping.Hu@inria.fr>
To: Todd Graham Lewis <tlewis@mindspring.net>, caml-list@inria.fr
Subject: Re: VLIW & caml: how?
Todd Graham Lewis wrote:
>
> I've been reading that VLIW as implemented on the IA-64/Merced will post
> problems for conventional compilers such as gcc which don't have a very
> expansive view of the code they're compiling. How well will o'caml deal
> with optimizing for this sort of architecture? Any thoughts?
>
If you can describe the IA-64/Merced at assembly language and hardware
level,
such as
-- the lexical and syntactical structure of the assembly language used,
-- the hardware resources(say register, memories, functional units etc),
...
in the environment SALTO(a retargetable System for Assembly Language
Transformation and Optimization,
http://www.irisa.fr/caps/PROJECTS/Salto/),
which has already offered several desciption examples for realistic
architectures(Sparc, TM1000(VLIW), etc),
then the compiler back-ends can handle the local and global optimization
(even Software pipelining) provided in SALTO. Ofcource,
the compilers can also implement theirs own optimizing algorithms with
the support of SALTO.
-- Ping Hu
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